Electronic Design

Bandwidth or Function? What to Focus on When Designing High-Density Circuits

Improving density in circuit design is an ongoing challenge. One solution is to reconsider circuit layouts from the perspective of bandwidth optimization.
GitHub

Firmware from UAC2.0 to I2S, supporting up to 32-bit 384KHz.

This project is a low-cost implementation of UAC2.0 to I2S, using MCU+CPLD to achieve asynchronous USB audio. This project can replace Amanero and XMOS solutions. Visit AGM for more information. Two ...
IEEE

Overview of FPGA and CPLD Device Testing Techniques Based on ATE

Abstract: Aiming at the test and development of programmable logic devices, this article focuses on the differences in FPGA test configurations from vendors, the differences in CPLD test ...
IEEE

The Design of ACE Fly by wire system fault monitoring based on CPLD

Abstract: In order to meet the aircraft reliability requirement, the actuator control electronics(ACE) based on the new concept in Fly by wire system(FBW) was study. ACE working principle, hardware ...
GitHub

The two different designs of the BPB used in the BIRDS3 mission, one with CPLD and one without.

The project was led by Kyushu Institute of Technology in Japan and involves students from Sri Lanka, Bhutan, Nepal and Japan. Satellite Names: NepaliSat-1 (Nepal), Raavana-1 (Sri Lanka) and Ugiusu ...