EDN

Xilinx Tapes-Out First 20nm All Programmable Device with First UltraScale ASIC-class Programmable Architecture

SAN JOSE, Calif., July 9, 2013 /PRNewswire/ — Xilinx, Inc. (NASDAQ: XLNX) announced two more industry firsts at 20nm, expanding on a series of industry innovations started at 28nm. Xilinx has now ...
Design-Reuse

Xilinx 20nm All Programmable UltraScale Portfolio Now Available with ASIC-class Architecture and ASIC-strength Design Solution

Detailed device tables, product documentation, design tools, and methodology support now available for Kintex mid-range and Virtex high-end 20nm UltraScale families SAN JOSE, Calif., Dec. 10, 2013-- ...
New Electronics

‘Asic like’ architecture to underpin Xilinx’ future products

Xilinx has launched the Ultrascale architecture, intended to take its products beyond the 20nm node. European marketing director Giles Peckham said: "Ultrascale devices, which support 20nm linear and ...
Design-Reuse

Xilinx Tapes-out First Virtex UltraScale All Programmable Device as Part of Industry's Only High-End 20nm Family

SAN JOSE, Calif. -- Jan. 21, 2014 -- Xilinx, Inc. (NASDAQ: XLNX) today announced another industry first at 20nm with the tape-out of the first Virtex® UltraScale™ device. Based on the UltraScale ...
ZDNet

EMC claims double boost for Clariion

A new "breakthrough in midrange storage performance, scalability and economics" is EMC's claim for UltraScale — its latest design for the Clariion CX3 range — which it launched on Monday. The move ...
Electronic Design

Expanding The FPGA Interconnect

Xilinx's UltraScale architecture moves FPGA layout to a new level. It provides high speed interconnections to dispersed logic elements on large FPGAs. The UltraScale architecture is Xilinx's answer to ...
Business Wire

Aldec HES-7 with Xilinx Virtex UltraScale Devices Enables True FPGA-based Verification

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, is extending its leadership in ...
Electronic Design

PXI FlexRIO architecture employs Xilinx Kintex UltraScale technology

Austin, TX. NI has announced a new PXI FlexRIO architecture that integrates mezzanine I/O modules with Xilinx Kintex UltraScale FPGAs. The first wave of products based on this new architecture ...
Semiconductor Engineering

RT Kintex UltraScale FPGAs For Ultra High Throughput And High Bandwidth Applications

How this radiation-tolerant (RT) FPGA enables next-gen high-throughput satellite services with reconfigurable payloads and unprecedented levels of onboard processing across all radiation orbits.
InfoWorld

EMC refreshes Clariion storage

EMC on Monday will unveil a new design for its Clariion midrange storage aimed to give midsized businesses more performance and flexibility, and will roll out the first arrays based on the new ...
Zawya

Ahead of storage World Middle East, EMC redefines midrange with new CLARiiON architecture

DUBAI, United Arab Emirates - May 11, 2006 - Just ahead of Storage World Middle East, the regional operations of EMC Corporation, the world leader in information management and storage, have ...
EDN

Xilinx Tapes-out First Virtex UltraScale All Programmable Device as Part of Industry’s Only High-End 20nm Family

Based on TSMC's 20SoC process, the first Virtex UltraScale device, called the VU095, features 940k logic cells plus six integrated 150G Interlaken and four 100G Ethernet cores—equivalent to an ...